Decoding of DVB-T2 LDPC Codes on a Tile Processor: Optimisations and Performance Comparisons

Multiple code rates and codeword lengths of 16200 bits and 64800 bits are used in broadcasting media by second generation Digital Video Broadcasting standard (DVB). Software defined radios can benefit from real-time decod- ing of these codes on general purpose computing hardware. However, the iterative decoding algorithm of Low Density Parity Check (LDPC) codes is an NP-complete problem. To this end, multicore processors can be used to decode LDPC codes in parallel and the network bottleneck caused by irregular memory access can be handled by balancing computational and communication load between the processors. Presented in this paper are the algorithms and the data structures used to implement log-domain decoding of the long LDPC codes specified by the DVB standards on a TILEPro64 multicore processor. Two implementation methods are discussed and a maximum throughput of 1.09 Mbps and 970 kbps for rate 1/2 and 4/5 LDPC codes were obtained respectively. Despite the non-real time throughput, valuable insights were ob- tained from the approach. The paper details the approach used and analyses the virtues and shortcomings of the implementation methods.