Quantifying the Interaction Between Structural Properties of Software and Hardware in the ARM Big.LITTLE Architecture

Srboljub Stepanovic, Georgios Georgakarakos, Simon Holmbacka, Johan Lilius

Research output: Chapter in Book/Conference proceedingConference contributionScientificpeer-review

1 Citation (Scopus)
5 Downloads (Pure)

Abstract

Heterogeneous architectures offer the opportunity to achieve high performance and energy efficiency by selecting appropriate cores for execution of ever changing software applications. Appropriate core selection depends on the interaction between the structural properties of the software and the hardware that influences performance of the software. We propose a model for efficient core selection when executing software on ARM's big.LITTLE heterogeneous architecture. It features a metric based on the correlation between the performance and the number of last level data cache (LLC) misses on a big and a LITTLE core. Additionally our model defines a soft threshold in terms of the number of LLC misses that determines efficient core selection. We verify the model on both a stress benchmark (stress-ng) and a performance and energy demanding application (HEVC decoding) using XMEM and Linux perf dynamic tools.
Original languageUndefined/Unknown
Title of host publication2018 26th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)
EditorsIvan Merelli, Pietro Lio, Igor Kotenko
PublisherIEEE
Pages138–144
ISBN (Electronic)978-1-5386-4975-6
ISBN (Print)978-1-5386-4976-3
DOIs
Publication statusPublished - 2018
MoE publication typeA4 Article in a conference publication
EventEuromicro International Conference on Parallel, Distributed and Network-based Processing (PDP) - Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)
Duration: 21 Mar 201823 Mar 2018

Conference

ConferenceEuromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)
Period21/03/1823/03/18

Keywords

  • ARM big.LITTLE architecture
  • Benchmark testing
  • Cache storage
  • HEVC
  • Hardware
  • LITTLE heterogeneous architecture
  • LLC
  • Linux
  • Linux perf dynamic tools
  • Microarchitecture
  • Multicore processing
  • Performance evaluation
  • Pipelines
  • Shared memory systems
  • Software
  • Structural properties
  • Tools
  • XMEM
  • appropriate core selection
  • big.LITTLE
  • cycles per instruction
  • efficient core selection
  • energy demanding application
  • executing software
  • heterogeneous architecture
  • heterogeneous architectures
  • high performance
  • last level data cache misses
  • microprocessor chips
  • multiprocessing systems
  • parallel architectures
  • power aware computing
  • soft threshold
  • software applications
  • stress-ng

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