Memory Analysis of Low Power MPEG-4 Decoder Architecture

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    4 Citations (Scopus)

    Abstract

    Recent research has shown that in mobile devices, energy efficiency of the total system does not scale at the same pace with the energy efficiency of the silicon. The reason has been attributed to overheads in software, and in the context of multi-media codecs a new approach has been proposed. In this approach hardware accelerators are scheduled quasi-statically thus decreasing the interfacing overhead substantially. The validation of the approach has been done by restructuring the open-source Xvid codec software implementation. In this paper we analyse the approach for its memory requirements, and propose some optimisations that will substantially decrease the memory bandwidth of the approach.
    Original languageUndefined/Unknown
    Title of host publicationEmbedded Software and Systems, 2009. ICESS '09. International Conference on
    PublisherIEEE Computer Society
    Pages231–237
    Number of pages7
    ISBN (Print)978-1-4244-4359-8
    DOIs
    Publication statusPublished - 2009
    MoE publication typeA4 Article in a conference publication
    Eventconference; 2009-05-25; 2009-05-27 - 6th IEEE International Conference on Embedded Systems and Software, ICESS'09
    Duration: 25 May 200927 May 2009

    Conference

    Conferenceconference; 2009-05-25; 2009-05-27
    Period25/05/0927/05/09

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