Abstract
Developing safety-critical systems requires to consider safety and real-time requirements in addition to functional requirements. Event-B is a formalism that is visualised by iUML-B and supports the development of functional aspects having rich verification and validation tools. However, it lacks well-established support for timing analysis. UPPAAL Timed Automata (UTA), on the other hand, address timing aspects of systems, and enable model checking reachability and timing properties. By integrating iUML-B and UTA, we combine the best verifying and validating practices from the two methods achieving a formal development of systems. We present the mapping for translating iUML-B constructs to UTA. The novel aspect is the use of a multi-process trigger-response pattern to address the modelling and verification of reachability properties of complex systems with concurrent processes. The approach is demonstrated on an airport control system, where timing, fairness, as well as liveness properties play a vital role in proving safety requirements.
| Original language | English |
|---|---|
| Title of host publication | Rigorous State-Based Methods - 7th International Conference, ABZ 2020, Proceedings |
| Editors | Alexander Raschke, Dominique Méry, Frank Houdek |
| Publisher | Springer |
| Pages | 186-202 |
| ISBN (Electronic) | 978-3-030-48077-6 |
| ISBN (Print) | 978-3-030-48076-9 |
| Publication status | Published - 2020 |
| MoE publication type | A4 Article in a conference publication |
| Event | International Conference on Rigorous State-Based Methods - ABZ 2020 – 7th International Conference on Rigorous State Based Methods Duration: 27 May 2020 → 29 May 2020 |
Publication series
| Name | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
|---|---|
| Volume | 12071 LNCS |
| ISSN (Print) | 0302-9743 |
| ISSN (Electronic) | 1611-3349 |
Conference
| Conference | International Conference on Rigorous State-Based Methods |
|---|---|
| Period | 27/05/20 → 29/05/20 |
Funding
Acknowledgments. This work has received funding from the Electronic Component Systems for European Leadership Joint Undertaking under grant agreement No 737494. This Joint Undertaking receives support from the European Union’s Horizon 2020 research and innovation programme and Sweden, France, Spain, Italy, Finland, the Czech Republic. This was also supported by the ERDF funded centre of excellence project EXCITE (2014-2020.4.01.15-0018) and the Estonian Ministry of Education and Research institutional research grant no. IUT33-13.
Keywords
- Formal verification
- Model checking
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