Integration of iUML-B and UPPAAL Timed Automata for Development of Real-Time Systems with Concurrent Processes

Fatima Shokri-Manninen, Leonidas Tsiopoulos, Jüri Vain, Marina Walden

Research output: Chapter in Book/Conference proceedingConference contributionScientificpeer-review

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Abstract

Developing safety-critical systems requires to consider safety and real-time requirements in addition to functional requirements. Event-B is a formalism that is visualised by iUML-B and supports the development of functional aspects having rich verification and validation tools. However, it lacks well-established support for timing analysis. UPPAAL Timed Automata (UTA), on the other hand, address timing aspects of systems, and enable model checking reachability and timing properties. By integrating iUML-B and UTA, we combine the best verifying and validating practices from the two methods achieving a formal development of systems. We present the mapping for translating iUML-B constructs to UTA. The novel aspect is the use of a multi-process trigger-response pattern to address the modelling and verification of reachability properties of complex systems with concurrent processes. The approach is demonstrated on an airport control system, where timing, fairness, as well as liveness properties play a vital role in proving safety requirements.
Original languageUndefined/Unknown
Title of host publicationRigorous State-Based Methods 7th International Conference, ABZ 2020, Ulm, Germany, May 27–29, 2020, Proceedings
EditorsAlexander Raschke, Dominique Méry, Frank Houdek
PublisherSpringer
Pages
ISBN (Electronic)978-3-030-48077-6
ISBN (Print)978-3-030-48076-9
DOIs
Publication statusPublished - 2020
MoE publication typeA4 Article in a conference publication
EventInternational Conference on Rigorous State-Based Methods - ABZ 2020 – 7th International Conference on Rigorous State Based Methods
Duration: 27 May 202029 May 2020

Conference

ConferenceInternational Conference on Rigorous State-Based Methods
Period27/05/2029/05/20

Keywords

  • Formal verification
  • Model checking

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