Energy Efficiency Platform Characterization for Heterogeneous Multicore Architectures

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Abstract

Runtime estimation of power dissipation and performance is crucial in every computing platform. In mobile systems,a special focus is set on energy efficiency in order to achievethe longest possible battery life and at the same time adheringto performance requirements. Powered by heterogeneous SoC’s,mobile systems are called to reach an energy efficient state ofexecution, with a runtime system or scheduler that requiresknowledge on the current performance and power dissipation.Today, highly heterogeneous architectures provide many actuators to reach better efficiency, the effect of which is usuallyunknown at runtime. In this paper, we propose a fast approach tobuild an energy efficiency model based on hardware performancecounters. Our approach obviates the need for power sensorspresent at the chip level and deals with high numbers of executionmodes. In building the energy efficiency model we account forthe change in temperature which, as we show, has an impacton the optimal energy efficiency choice. The proposed approachreduces significantly the time to characterize the energy efficiencyof a Multiprocessor System-on-Chip (MPSoC) and includes theenvironment temperature as a variable in determining the energyefficiency

Original languageUndefined/Unknown
Title of host publicationProceedings of the 6th International Conference on ICT for Sustainability
EditorsAnnika Wolff
Pages
Publication statusPublished - 2019
MoE publication typeA4 Article in a conference publication
EventICT4S 2019 ICT for Sustainability - ICT4S 2019 ICT for Sustainability
Duration: 10 Jun 201914 Jun 2019

Publication series

NameCEUR-WS.org
ISSN (Electronic)1613-0073

Conference

ConferenceICT4S 2019 ICT for Sustainability
Period10/06/1914/06/19

Keywords

  • Energy Efficiency Models
  • MPSoC
  • Platform Configuration Point

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