Projects per year
Applications have traditionally been executed as fast as possible (Race-to-Idle) and mapped to as many cores as possible (Fair scheduling) to minimize the energy consumption. With modern hardware, this method has become inefficient because of the power characteristics of the platforms. Instead, applications should utilize an optimal combination of clock frequency and number of cores to balance the dynamic and static power. Such approaches have been difficult to achieve since resource allocation is based only on CPU utilization. Resources are then allocated to prohibit over utilization rather than following software performance requirements. By adjusting the clock frequency directly according to software requirements and activating CPU cores according to the application parallelism, significant energy can be saved by lowering the average power dissipation. To enforce these recommendations, this paper provides means of expressing performance and parallelism in applications for more tight integration with the power management to balance the execution speed and mapping on multi-core systems. An interface between the applications and the hardware resources is provided in combination with a novel power management runtime system called Bricktop. A signal processing case study demonstrates real-world energy savings up to 50 % without performance degradation.
|Journal||Journal of Signal Processing Systems|
|Publication status||Published - 2017|
|MoE publication type||A1 Journal article-refereed|
- 1 Finished
ESC: Efficient Stream Computing by Fitting Computations to Cores
Lilius, J., Lafond, S., Zelioli, L., Iancu, B., Soloviev, V., Georgakarakos, G. & Kanur Chandra Shekar, S.
01/09/17 → 31/08/21
Project: Academy of Finland/Other Research Councils