Efficient GPU and CPU-Based LDPC Decoders for Long Codewords

    Research output: Contribution to journalArticleScientificpeer-review

    Abstract

    The next generation DVB-T2, DVB-S2, and DVB-C2 standards for digital television broadcasting specify the use of low-density parity-check (LDPC) codes with codeword lengths of up to 64800 bits. The real-time decoding of these codes on general purpose computing hardware is useful for completely software defined receivers, as well as for testing and simulation purposes. Modern graphics processing units (GPUs) are capable of massively parallel computation, and can in some cases, given carefully designed algorithms, outperform general purpose CPUs (central processing units) by an order of magnitude or more. The main problem in decoding LDPC codes on GPU hardware is that LDPC decoding generates irregular memory accesses, which tend to carry heavy performance penalties (in terms of efficiency) on GPUs. Memory accesses can be efficiently parallelized by decoding several codewords in parallel, as well as by using appropriate data structures. In this article we present the algorithms and data structures used to make log-domain decoding of the long LDPC codes specified by the DVB-T2 standard—at the high data rates required for television broadcasting—possible on a modern GPU. Furthermore, we also describe a similar decoder implemented on a general purpose CPU, and show that high performance LDPC decoders are also possible on modern multi-core CPUs.
    Original languageUndefined/Unknown
    Pages (from-to)583–595
    JournalAnalog Integrated Circuits and Signal Processing
    Volume73
    Issue number2
    DOIs
    Publication statusPublished - 2012
    MoE publication typeA1 Journal article-refereed

    Keywords

    • Low-Density Parity-Check Codes
    • Software Defined Radio
    • CUDA
    • SSE - Streaming SIMD Extensions

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