Performance Monitor Based Power Management for big.LITTLE Platforms

A4 Conference proceedings

Internal Authors/Editors

Publication Details

List of Authors: Simon Holmbacka, Sébastien Lafond, Johan Lilius
Publication year: 2015
Publisher: International conference on high-performance and embedded architectures and compilers
Book title: N/A


Recently new heterogeneous computing architectures, coupling low-power low-end cores with powerful, power-hungry cores, appeared on the market. From a power management point of view, and compared to traditional homogeneous multi-core architectures, such architectures provide one more variable: the core type to map applications on. At the same time conventional power managers drives the
DVFS mechanism based on the notion of workload. This means that as long as the CPU is capable of executing work, a workload increase will result in a frequency increase. In practice this results in a Race-to-Idle execution which mostly
uses high clock frequencies. In this work we propose a performance monitor based power manager for cluster switched ARM big.LITTLE architectures. The proposed power manager allocates resources based on application performance
rather than workload levels, which allows the hardware to adapt closer to software requirements. The presented power manager is capable of saving up to 57% of energy with the addition of one line of c-code in legacy applications.

Last updated on 2019-06-12 at 06:03